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CMOS STATIC RAM 1 MEG (128K x 8-BIT)
Integrated Device Technology, Inc.
IDT71024
FEATURES:
* 128K x 8 advanced high-speed CMOS static RAM * Commercial (0 to 70C), Industrial (-40 to 85C) and Military (-55 to 125C) temperature options * Equal access and cycle times -- Military: 15/17/20/25ns -- Industrial: 15/20ns -- Commercial: 12/15/17/20ns * Two Chip Selects plus one Output Enable pin * Bidirectional inputs and outputs directly TTL-compatible * Low power consumption via chip deselect * Available in 300 and 400 mil Plastic SOJ, and LCC packages * Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT71024 is a 1,048,576-bit high-speed static RAM organized as 128K x 8. It is fabricated using IDT's highperformance, high-reliability CMOS technology. This stateof-the-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for high-speed memory needs. The IDT71024 has an output enable pin which operates as fast as 6ns, with address access times as fast as 12ns available. All bidirectional inputs and outputs of the IDT71024 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. The IDT71024 is packaged in 32-pin 300 mil Plastic SOJ, 32-pin 400 mil Plastic SOJ, and 32-pin 400 x 820 mil LCC packages.
FUNCTIONAL BLOCK DIAGRAM
A0
* * *
A16
ADDRESS DECODER
* * *
1,048,576-BIT MEMORY ARRAY
I/O0 - I/O7
*
8
8
I/O CONTROL
8
WE OE CS1
CS2
CONTROL LOGIC
2964 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
(c)1996 Integrated Device Technology, Inc.
MAY 1997
DSC-2964/08
1
IDT71024 CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 32 2 31 3 30 4 29 5 28 6 SO32-2 27 7 SO32-3 26 8 L32-2 25 24 9 23 10 22 11 21 12 13 20 14 19 15 18 16 17 VCC A15 CS2
WE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM TBIAS TSTG PT IOUT
(2)
Rating
Com'l, Ind'l
Mil. -0.5 to +7.0 -65 to +135 -65 to +150 1.25 50
Unit V C C W mA
Terminal Voltage -0.5 to +7.0 Relative to GND Temperature -55 to +125 Under Bias Storage Temperature Power Dissipation DC Output Current -55 to +125 1.25 50
A13 A8 A9 A11
OE
A10
CS1
I/O7 I/O6 I/O5 I/O4 I/O3
2964 drw 02
NOTES: 2964 tbl 02 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VTERM must not exceed VCC + 0.5V.
SOJ/LCC TOP VIEW
TRUTH TABLE(1,2)
INPUTS
WE CS1
RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE
I/O High-Z High-Z High-Z High-Z High-Z FUNCTION Deselected-Standby (ISB) Deselected-Standby (ISB1) Deselected-Standby (ISB) Deselected-Standby (ISB1) Outputs Disabled Read Data Write Data
2964 tbl 01
CS2 X X L VLC H H H
(3)
OE
Grade Commercial Industrial Military
Temperature 0C to +70C -40C to +85C -55C to +125C
GND 0V 0V 0V
VCC 5.0V 0.5V 5.0V 0.5V 5.0V 0.5V
2964 tbl 03
X X X X H H L
H VHC(3) X X L L L
X X X X H L X
DATAOUT DATAIN
RECOMMENDED DC OPERATING CONDITIONS
Symbol VCC GND VIH VIL Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.5(1) Typ. 5.0 0 -- -- Max. 5.5 0 Vcc+0.5 0.8 Unit V V V V
NOTES: 1. H = VIH, L = VIL, X = Don't care. 2. VLC = 0.2V, VHC = VCC -0.2V. 3. Other inputs VHC or VLC.
NOTE: 2964 tbl 04 1. VIL (min.) = -1.5V for pulse width less than 10ns, once per cycle.
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V 10%
IDT71024 Symbol |ILI| |ILO| VOL VOH Parameter Input Leakage Current Output Leakage Current Output LOW Voltage Output HIGH Voltage Test Condition VCC = Max., VIN = GND to VCC VCC = Max., CS1 = VIH, CS2 = VIL, VOUT = GND to VCC IOL = 8mA, VCC = Min. IOH = -4mA, VCC = Min. Min. -- -- -- 2.4 Max. 5 5 0.4 -- Unit A A V V
2964 tbl 05
2
IDT71024 CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS(1)
(VCC = 5.0V 10%, VLC = 0.2V, VHC = VCC - 0.2V)
71024S12 Symbol ICC Parameter Dynamic Operating Current, CS2 VIH and CS2 VIH and CS1 VIL, Outputs Open, VCC = Max., f = fMAX(2) Standby Power Supply Current (TTL Level) CS1 VIH or CS2 VIL, Outputs Open, VCC = Max., f = fMAX(2) Full Standby Power Supply Current (CMOS Level) CS1 VHC, or CS2 VLC Outputs Open, VCC = Max., f = 0(2), VIN VLC or VIN VHC 160 -- 71024S15 155 180 71024S17 150 170 71024S20 140 160 71024S25 Com'l. Mil. -- 145 Unit mA Com'l. Mil. Com'l. Mil. Com'l. Mil. Com'l. Mil.
ISB
35
--
35
40
35
40
35
40
--
35
mA
ISB1
10
--
10
15
10
15
10
15
--
15
mA
NOTES: 1. All values are maximum guaranteed values. 2. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.
2964 tbl 06
DC ELECTRICAL CHARACTERISTICS(1)
(VCC = 5.0V 10%, VLC = 0.2V, VHC = VCC - 0.2V)
71024S15 Symbol ICC Parameter Dynamic Operating Current, CS2 VIH and CS2 VIH and CS1 VIL, Outputs Open, VCC = Max., f = fMAX(2) Standby Power Supply Current (TTL Level) CS1 VIH or CS2 VIL, Outputs Open, VCC = Max., f = fMAX(2) Full Standby Power Supply Current (CMOS Level) CS1 VHC, or CS2 VLC Outputs Open, VCC = Max., f = 0(2), VIN VLC or VIN VHC Industrial 180 71024S20 Industrial 160 Unit mA
ISB
45
45
mA
ISB1
15
15
mA
NOTES: 1. All values are maximum guaranteed values. 2. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.
2964 tbl 07
CAPACITANCE
(TA = +25C, f = 1.0MHz, SOJ package)
Symbol CIN CI/O Parameter(1) Input Capacitance I/O Capacitance Conditions VIN = 3dV VOUT = 3dV Max. 7 8 Unit pF pF
NOTE: 2964 tbl 08 1. This parameter is guaranteed by device characterization, but is not production tested.
3
IDT71024 CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
AC TEST CONDITIONS
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels AC Test Load GND to 3.0V 3ns 1.5V 1.5V See Figures 1 and 2
2964 tbl 09
5V 480 DATAOUT 30pF 255
2964 drw 03
5V 480 DATAOUT 5pF* 255
2964 drw 04
Figure 1. AC Test Load
*Including jig and scope capacitance. Figure 2. AC Test Load (for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
4
IDT71024 CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V 10%, All Temperature Ranges)
Symbol Parameter 71024S12(1) Min. Max. 71024S15 Min. Max. 71024S17(3) 71024S20 71024S25(2) Min. Max. Min. Max. Min. Max. Unit
Read Cycle tRC tAA tACS tCLZ
(4) (4)
Read Cycle Time Address Access Time Chip Select Access Time Chip Select to Output in Low-Z Chip Deselect to Output in High-Z Output Enable to Output Valid
(4) (4)
12 -- -- 3 0 -- 0 0 4 0 --
-- 12 12 -- 6 6 -- 5 -- -- 12
15 -- -- 3 0 -- 0 0 4 0 --
-- 15 15 -- 7 7 -- 5 -- -- 15
17 -- -- 3 0 -- 0 0 4 0 --
-- 17 17 -- 8 8 -- 6 -- -- 17
20 -- -- 3 0 -- 0 0 4 0 --
-- 20 20 -- 8 8 -- 7 -- -- 20
25 -- -- 3 0 -- 0 0 4 0 --
-- 25 25 -- 10 10 -- 10 -- -- 25
ns ns ns ns ns ns ns ns ns ns ns
tCHZ tOE tOLZ
Output Enable to Output in Low-Z Output Disable to Output in High-Z Output Hold from Address Change Chip Select to Power-Up Time Chip Deselect to Power-Down Time
tOHZ tOH tPU tPD
(4) (4)
Write Cycle tWC tAW tCW tAS tWP tWR tDW tDH tOW(4) tWHZ
(4)
Write Cycle Time Address Valid to End-of-Write Chip Select to End-of-Write Address Set-up Time Write Pulse Width Write Recovery Time Data Valid to End-of-Write Data Hold Time Output Active from End-of-Write Write Enable to Output in High-Z
12 10 10 0 10 0 7 0 3 0
-- -- -- -- -- -- -- -- -- 5
15 12 12 0 12 0 8 0 3 0
-- -- -- -- -- -- -- -- -- 5
17 13 13 0 13 0 9 0 3 0
-- -- -- -- -- -- -- -- -- 7
20 15 15 0 15 0 9 0 4 0
-- -- -- -- -- -- -- -- -- 8
25 15 15 0 15 0 10 0 4 0
-- -- -- -- -- -- -- -- -- 9
ns ns ns ns ns ns ns ns ns ns
2964 tbl 010
NOTES: 1. 0C to +70C temperature range only. 2. -55C to +125C temperature range only. 3. 0C to +70C and -55C to +125C temperature ranges only. 4. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
5
IDT71024 CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF READ CYCLE NO. 1(1)
t RC ADDRESS t AA
OE
t OE
CS1
t OLZ
(5)
CS2 t CLZ (5) DATA OUT Vcc SUPPLY CURRENT Icc Isb
t ACS (3) t OHZ (5) t CHZ (5) DATA OUT VALID t PD
HIGH IMPEDANCE t PU
2964 drw 06
TIMING WAVEFORM OF READ CYCLE NO. 2(1, 2, 4)
tRC ADDRESS tAA tOH DATAOUT PREVIOUS DATAOUT VALID tOH DATAOUT VALID
2964 drw 07
NOTES: 1. WE is HIGH for Read Cycle. 2. Device is continuously selected, CS1 is LOW, CS2 is HIGH. 3. Address must be valid prior to or coincident with the later of CS1 transition LOW and CS2 transition HIGH; otherwise tAA is the limiting parameter. 4. OE is LOW. 5. Transition is measured 200mV from steady state.
6
IDT71024 CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED TIMING)(1, 2, 5, 7) WE
tWC ADDRESS tAW
CS1
tCW
CS2 tAS
WE
tWR tWP (7)
(3)
tWHZ DATAOUT
(4)
(6)
tOW HIGH IMPEDANCE tDH tDW
(6)
tCHZ (6)
(4)
DATAIN
DATAIN VALID
2964 drw 09
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CS1 AND CS2 CONTROLLED TIMING)(1, 2, 5) CS1
tWC ADDRESS tAW
CS1
CS2 tAS
WE
tCW
tWR
(3)
tDW DATAIN DATAIN VALID
tDH
2964 drw 10
NOTES: 1. WE must be HIGH, CS1 must be HIGH, or CS2 must be LOW during all address transitions. 2. A write occurs during the overlap of a LOW CS1, HIGH CS2, and a LOW WE. 3. tWR is measured from the earlier of either CS1 or WE going HIGH or CS2 going LOW to the end of the write cycle. 4. During this period, I/O pins are in the output state, and input signals must not be applied. 5. If the CS1 LOW transition or the CS2 HIGH transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high impedance state. CS1 and CS2 must both be active during the tCW write period. 6. Transition is measured 200mV from steady state. 7. OE is continuously HIGH. During a WE controlled write cycle with OE LOW, tWP must be greater than or equal to tWHZ + tDW to allow the I/O drivers to turn off and data to be placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the minimum write pulse is the specified tWP.
7
IDT71024 CMOS STATIC RAM 1MEG (128K x 8-BIT)
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT 71024 Device Type S Power XX Speed X Package X Process/ Temperature Range Blank TY Y 12 15 17 20 Commercial (0C to +70C) 300-mil SOJ (SO32-2) 400-mil SOJ (SO32-3)
Speed in nanoseconds
2964 drw 11
IDT
71024 Device Type
S Power
XX Speed
X Package
X Process/ Temperature Range I Industrial (-40C to +85C)
Y 15 20
400-mil SOJ (SO32-3)
Speed in nanoseconds
2964 drw 12
IDT
71024 Device Type
S Power
XX Speed
X Package
X Process/ Temperature Range B Military (-55C to +125C) Compliant to MIL-STD-883, Class B 400 x 820 mil LCC package (L32-2)
L 15 17 20 25
Speed in nanoseconds
2964 drw 13
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